The job of comparing two electrical quantities to one another occurs in many fields of technology. For example, these comparisons are thus a foundation of electrical mensuration technology. Threshold equations can also be technically realized with the assistance of evaluator circuits.
Methods that compare electrical quantities with the assistance of operational amplifiers are known and are often employed (U. Tietze, Ch. Schenk, Halbleiterschaltungstechnik, 9th Edition Springer Verlag, 1990, pages 132 through 143). A significant disadvantage of these methods is comprised in the conversion of static dissipated power and in the comparatively large space requirement of such circuits, particularly when a great number of them are required. A further possibility of implementing an evaluation of two electrical quantities is comprised in the employment of a neuron MOS inverter, whereby the reference quantity to which another electrical quantity is to be compared is determined by the switching threshold of the neuron MOS inverter (T. Shibata and T. Ohmi, "A function MOS Transistor featuring gate-level weighted sum and threshold operations", IEEE Trans. Electron Devices, 39, 1992, pages 1444-1455). The employment of a neuron MOS inverter in this context exhibits a number of disadvantages. A static quadrature-access current component for all potentials flows on the floating gate .phi..sub.F with V.sub.SS +V.sub.th,n &lt;.phi..sub.F &lt;V.sub.DD -V.sub.th,p, this corresponding to the normal case during operation as threshold gate. Moreover, it is necessary to govern the technology parameters extremely well, so that the threshold dimensioning corresponds to the desired behavior, i.e. that narrow tolerances of the threshold voltage must be adhered to.
European reference EP 0 497 319 A1 discloses a circuit arrangement for the comparison of two electrical quantities that comprises a current mirror, two MOS field effect transistors as well as an inverter unit. The currents supplied by the two transistors are compared to one another in the current mirror and the result signal is offered at the output of the inverter unit. This circuit arrangement only makes a comparison of two electrical quantities possible.
Fundamentals about the neuron MOS field effect transistor are known from T. Shibata, A Functional MOS Transistor Featuring Gate-Level Weighted Sum and Threshold Operations, IEEE Transactions on Electron Devices, Vol. 39, No. 6, New York, pp. 1144-1455, June 1992.
U.S. Pat. No. 3,850,635 discloses a multiplier cell containing two comparators.